[ect-announce-ja] 【論文募集】 2010 Analog VLSI Workshop in Pavia, Italy on Sept. 8-10

[Nicodimus Retdian]

技術者・研究者の皆様

電子回路研究専門委員が主催する
2010 IEEJ INTERNATIONAL ANALOG VLSI WORKSHOP の
論文募集案内をお送り致します。


開催期間: 2010年9月８日〜1０日
開催場所: Pavia, Italy
投稿締め切り: 2010年5月7日
                    ^^^^^^^^^^

となっております。
皆様のご投稿を心からお待ちしております。


                      ---------- FIRST CALL FOR PAPERS -----------

          >>>>>  2010 IEEJ INTERNATIONAL ANALOG VLSI WORKSHOP  <<<<<

                                        September 8-10, 2010

                                              Pavia, Italy
                                              ^^^^^^^^^^^

The 2010 International Analog VLSI Workshop will be held in Pavia, Italy, on
September 8-10, 2010. This workshop is organized by the Research Committee
on Electronic Circuits of the Institute of Electrical Engineers of Japan
(IEEJ) in cooperation with University of Pavia and the IEEE-Solid State
Circuit Society Italy Section.
The purpose of the workshop is to exchange information, ideas and recent
research results on analog VLSI circuits and their applications. This
workshop has formed a long-standing community for various analog VLSI
circuit specialists from both industry and academia worldwide, and promoted
active brainstorming among them at the site. The work discussed in the
workshop is not required to be complete results from a test chip are not
mandatory, for example. The topics for the workshop include the following
but are not limited to:

Analog and Mixed Analog-Digital Integrated Circuits:
　		Amplifiers, Filters, Comparators, Oscillators, Multipliers,
　　　
　		Voltage/Current References, Sample-And-Hold Circuits, A/D
and D/A
　		Converters, PLL, High speed IO Interface, DC-DC converters

Analog Signal and Information Processing Applications:
  		Telecommunication, Multimedia, Automotive Electronics,
Biomedical
　		Electronics, Consumer Electronics, Neural Networks, Sensing
and Sensor
　		Networks, Space and Military Electronics

Analog VLSI Design Automation:
　		Layout Techniques, Simulation Techniques, AHDL, Analog IP

Advanced Technologies for Analog VLSI:
　		Nanoelectronics, TFT, Organic Semiconductors

Authors are required to send their manuscripts written in English within 4-6
pages, along with information which includes the complete title, author
name(s), affiliation(s) of author(s), and corresponding author (name, postal
and e-mail addresses, telephone/fax numbers), via online submission at our
website by May 7, 2010. After peer reviewing by experts, notification of
acceptance will be sent via e-mail by June 28, 2010.
Camera-ready manuscript should be prepared in the workshop format which is
provided on the website. The deadline for camera-ready manuscript submission
is July 9, 2010. At least one of the authors must register by July 20, 2010,
otherwise the paper will not be included in the workshop proceedings. It is
mandatory that all accepted papers must be presented at the workshop.

Important Date:
Deadline for Paper Submission			May 7, 2010
Notification of Acceptance 			June 28, 2010
Deadline of Camera Ready Manuscript Submission 	July 9, 2010
Deadline for Author Registration			July 20, 2010
Deadline for Early Registration (Non-Author) 	July 20, 2010