[ect-announce] [CFP]The IEICE Transactions on Electronics : Special Section on Analog Circuits and Related SoC Integration Technologies (June, 2016)

[Hao SAN]

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Special Section on Analog Circuits and Related SoC Integration Technologies
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The IEICE Transactions on Electronics announces a forthcoming Special
Section on Analog Circuits and Related SoC Integration Technologies to be
published in June 2016.
The rapid progress of IOT(Internet Of Things) demands the evolution of
integrated circuits in many fields such as information system, health /
biomedicine, and energy management. Recent analog circuits and its
integration technologies have made a great contribution in these fields.
Challenges toward enhanced functionality as well as excellent performance of
analog circuits, while keeping low power and low cost, are strongly demanded
for the next-generation electronic systems. In addition to pure analog
circuit techniques, the scope of this special section includes fundamental
issues such as high-frequency circuits, co-design of analog and digital
circuits, analog circuits in SoC environments, analog circuit design for
manufacturability (DFM) and testability (DFT), as well as device modeling
technologies.

Authors working in this area are invited to submit original research papers
on topics, which include, but are not limited to:
--Circuit techniques for wireless/wired/optical communication systems --RF
circuits and broadband circuits --Low-power/low-voltage circuits
--High-speed/high-precision ADCs and DACs --Amplifiers, oscillators, PLLs,
voltage references, and power management circuits --Analog/RF integration
techniques for SoCs --Assembly related topics (electronic packaging, SiP,
module, EMC, supply noise, ground noise, digital noise, etc.) --Mixed-signal
integration applications (RFID, storage devices, tuners, automotive, sensor
and MEMS interfaces, biomedicine and healthcare, etc.) --Analog techniques
for high performance (high frequency ESD structures, power supply circuits,
etc.) --Device modeling techniques --Device technologies for analog circuits
(CMOS, BiCMOS, compound semiconductor, MEMS, etc.) --Design for
manufacturability (DFM) and/or testability (DFT) of analog circuits A paper
that includes chip implementation and its measurement results is welcome.

Submission due date is October 1, 2015. This special section will accept
only PAPERs and BRIEF PAPERs by electronic submission. Prospective authors
are requested to follow carefully the submission process described below.
Submit a paper using the IEICE Web site
https://review.ieice.org/regist/regist_baseinfo_e.aspx. Authors should
choose the [Special-CT] Analog Circuits and Related SoC Integration
Technologies as the "Journal/ Section" on the online screen. Do not choose
[Regular-EC].

Inquries: Takeshi Ueno
Wireless System Laboratory
Research and Development Center, Toshiba Corporation 1, Komukai-Toshiba-cho,
Saiwai-ku, Kawasaki, Kanagawa, 212-8582, Japan Tel : +81-44-549-2284, Email
: take.ueno at toshiba.co.jp

It is recommended that PAPERs and BRIEF PAPERs be within eight and three
printed pages in length, respectively. Manuscripts should be prepared
according to the "Information for Authors," the latest version of which is
available at: http://www.ieice.org/eng/shiori/mokuji_es.html.

Special Section Editorial Committee
Guest Editor-in-Chief: Yasuhiro Sugimoto (Chuo Univ.) Guest Editors: Takeshi
Ueno (Toshiba), Hao San (Tokyo City Univ.) Guest Associate Editors: Ippei
Akita (Toyohashi Univ. of Tech.), Masao Ito (Renesas System Design), Kenichi
Okada (Tokyo Inst. of Technology), Keita Yasutomi (Shizuoka Univ.), Takahide
Sato (Univ. of Yamanashi), Takeshi Shima (Kanagawa Univ.), Hiroshi Tanimoto
(Kitami Inst. of Technology), Koji Takinami (Panasonic), Takahiro Nakamura
(Hitachi), Kiichi Niitsu (Nagoya Univ.), Tatsuji Matsuura (Tokyo Univ. of
Science), Tetsuya Hirose (Kobe Univ.), Ryuichi Fujimoto (Toshiba), Shoichi
Masui (Fujitsu Laboratories), Tadashi Minotani (NTT Telecon), Cosy Muto
(Nagasaki Univ.), Ryuji Yoshimura (Rohm)

*Please note that if accepted, all authors, including those of invited
papers, will be required to pay the page charges covering partial cost of
publication. Authors will receive 50 copies of the reprint.

[IMPORTANT NOTICE] Authors must agree to the "Copyright Transfer and Page
Charge Agreement" via electronic submission. At least one of the authors
must be an IEICE member when the manuscript is submitted for review. Invited
papers are an exception. We recommend that authors unaffiliated with IEICE
apply for membership. For details, please visit the web-page,
http://www.ieice.org/eng/member/OM-appli.html.